RTL Destroyer

My KianV RISC-V ASIC is booting mainline Linux with SDRAM. Everything was developed from scratch. The board was made by @machdyne , and he also did the bring-up. Huge thanks to him! Damn... a 32-bit Linux machine running on my own ASIC. #RISCV #ASIC #Linux #SDRAM

StealthV – Custom RISC-V Quad-Core Linux SoC | Marketing Video

KIANV StealthV — my custom quad-core RISC-V Linux SoC, written in SystemVerilog and running on FPGA. No GPU — all 3D rendering runs on the four CPU cores. Four pinned workers handle fixed-point transforms, lighting and rasterization: 6,717 triangles at native 320×240, around 25 FPS on average

sketchfab.comStylized X- Wing

Music: Captain — Space Debris. 3D model: Stylized X-Wing by Alexander Günther (sketchfab.com/3d-models/st...), CC BY 4.0 (creativecommons.org/licenses/by/...), adapted for the renderer.

A tribute to Stanford — running on KIANV STEALTHV. My custom SystemVerilog SoC running Linux SMP on an FPGA. Four RV32IMA cores, Sv32 MMU and coherent L1/L2 caches. Still optimizing the L2, but already happy with the results.

KianV StealthV, my custom quad-core RV32IMA SoC written in SystemVerilog, running Linux SMP on a Digilent Genesys 2. Four pinned render threads share the work in row blocks: fixed-point 3D transforms, depth-tested triangles and Gouraud shading, directly into the Linux framebuffer.

KianV StealthV, my custom quad-core RISC-V Linux SoC on a Digilent Genesys 2 board. Four render threads pinned to four CPUs. Fixed-point 3D morphing, metallic balls, sine scroller and music. Software rendering directly into the framebuffer. No GPU.

KianV StealthV — my custom quad-core RV32IMA RISC-V SoC on FPGA, running Linux SMP. Fixed-point bounce physics: gravity, impacts, squash and stretch. Four CPU-pinned threads render the floor, shadows and balls, including depth testing, directly to /dev/fb0. Precomputed lighting, no FPU.

Bros, remember Bruno’s world-famous donut? That was always kind of a benchmark for me. Bare metal on my 5-stage core. Now look at this shit. My custom SystemVerilog SoC, KianV StealthV, running quad-core Linux. MMU, memory bandwidth, audio, video. A complete system. And I’m still not done.

Pretty fucking cool to see 1.5473 CPI on this thing. Four cores, Linux, MMU, DDR3, caches, video, audio, networking, SDIO. When this project started, it was a bare-metal pipelined CPU running directly from block RAM. No DDR, no caches. Around 1.1 CPI.

Yo brothers. I’ve been working on my quad-core again. Still no L2 cache for the moment. MP3 decoding, Bunny mesh in the framebuffer, X server, xeyes, analog clock with seconds, loader, CoreMark above 2 per MHz per core × 4, htop across all four cores. KianV Stealth

16 Sept

That’s me with @mole99.fosstodon.org.ap.brid.gy last fall at wafer.space Run 1, with the layout open in KLayout.

@mole99.fosstodon.org.ap.brid.gy

4 Sept

Friday is for demos. StealthV. RISC-V FPGA SoC. The Unix machine.

RTL Destroyer reposted

mole99

3 Sept

I got to try the RISC-V board of my friend Hirosh. It includes an open-source Linux-capable RISC-V CPU with MMU! What's special about it is that this SoC has been taped out on the open-source GF180MCU process using wafer.space 🚀 Since we're in different […] [Original post on fosstodon.org]

2 Sept

Finally turned my FPGA into a proper Debian machine. No more fucking BusyBox. Vim with syntax highlighting, Rust compiler, readelf, objdump, nm, GCC, G++, real Python. No MicroPython bullshit. Don't believe me? Here's the proof. Fucking awesome.

1 Sept

Looks like native GCC and G++ are now working on my dual-core. Fuck yeah. KianV. StealthV.

29 Aug

Small update: I now have dual-core SMP with a CoreMark > 2, without an L2 cache. Pretty damn cool. KianV StealthV Gangster SoC

29 Aug

And the cool thing is, that’s with video, audio, networking, and all kinds of other stuff sharing the same memory bandwidth. That’s pretty damn cool.

22 Aug

Quick KianV StealthV Linux SoC update: the dual core is now playing MP3s while rendering the MIT Bunny with Gouraud shading. Nice to see it all running together!

20 Aug

Still on vacation, bored, family’s not around… so I’m writing demos for my SoC because I don’t feel like doing logic design right now. 😄 StealthV This is a custom wizard.

NetBSD is now running on my 32-bit RISC-V KianV ASIC. As far as I can tell, this is the first documented case of NetBSD running on a physical 32-bit RISC-V ASIC. If anyone knows of an earlier one, please let me know. Many thanks to @mith.ro , and @mole99.fosstodon.org.ap.brid.gy

Keep track on netbsd running @ ASIC Bro

NetBSD is a descendant of the original Unix.

8 Aug

StealthV is now a quad-core Linux-capable RISC-V SoC.

8 Aug

StealthV is now a quad-core Linux-capable RISC-V SoC.

6 Aug

I love the Kintex-7.

Bro, I don't need an Amiga. I built my own Unix machine, and it does Amiga-style graphics. StealthV, from the Silicon Proven Bro.

github.comGitHub - ianhan/BitmapFonts: My collection of bitmap fonts pulled from various demoscene archives over the yearsMy collection of bitmap fonts pulled from various demoscene archives over the years - ianhan/BitmapFonts

font by @furan.bsky.social github.com/ianhan/Bitma...

Bad Apple!! on StealthV, my custom Linux RISC-V FPGA SoC. Music: Alstroemeria Records feat. nomico PV: Anira

RTL Destroyer reposted

font by @furan.bsky.social github.com/ianhan/Bitma...

3 Aug

My custom RISC-V SoC, StealthV, is running Linux and rendering this Stanford Bunny demo at around 29 FPS. Audio playback is running in parallel, making this a great test of the complete system working together.

2 Aug

I just got my friend Leo Moser's custom GF180MCU Fabulous FPGA board, produced by WaferSpace. It already has a design loaded, so I'll be playing around with it over the next few days and see what I can build with it. A custom FPGA is just insanely cool. Leo is an absolute legend.

github.com/mole99/wsrun...

2 Aug

github.comGitHub - mole99/wsrun1-fpga-bringup: Bring-up repository for my FABulous FPGA on wafer.space run 1Bring-up repository for my FABulous FPGA on wafer.space run 1 - mole99/wsrun1-fpga-bringup

RTL Destroyer reposted

Replying to @logicdestroyer.bsky.social

A C64 emulator is running on my Linux SoC, StealthV (marchID: 0x34), successfully executing Choplifter (1982).

Bro... it's kind of crazy. You build a Linux SoC from scratch on an FPGA, get Linux running on it, and your original goal was simply to run a C64 emulator on your own Linux system. KianV StealthV.

A C64 emulator is running on my Linux SoC, StealthV (marchID: 0x34), successfully executing Choplifter (1982).

RTL Destroyer reposted

Replying to @logicdestroyer.bsky.social

When the C64 can truly shine on your soft-core Linux SoC.

Bro... it's kind of crazy. You build a Linux SoC from scratch on an FPGA, get Linux running on it, and your original goal was simply to run a C64 emulator on your own Linux system. KianV StealthV.

When the C64 can truly shine on your soft-core Linux SoC.

27 July

MP3 playback under Linux while running X11 Another milestone for my custom StealthV RISC-V SoC. The system now plays 48 kHz, 256 kbps CBR MP3 audio entirely in software while running Linux and X11. No dedicated MP3 decoder. Everything is handled by my own RISC-V CPU and hardware.

26 July

Part 2: Doom under Linux with audio, not bare metal My custom Linux RISC-V SoC just became an arcade game machine. I originally set out to build a Unix RISC-V workstation. Now it runs Doom and Abuse under Linux on my custom StealthV RISC-V SoC.

24 July

My custom Linux RISC-V SoC just became an arcade game machine. I set out to build a Unix RISC-V workstation. Now it's running games on my custom Linux RISC-V StealthV SoC. The games run under Linux with virtual memory and render directly to the Linux framebuffer, not bare metal.

24 July

I designed the hardware from scratch, except for the DDR3 MIG controller. - Custom Linux-capable 32-bit StealthV RISC-V SoC on a Genesys 2 FPGA - 5-stage RISC-V CPU with GShare branch prediction - CPU, caches, MMU, Ethernet, SPI, audio, PS/2 and video hardware designed from scratch