Tim 'mithro' Ansell

Tim 'mithro' Ansell

@mith.ro

Open silicon professional, FPGAs, ASICs, & more! me@mith.ro https://bit.ly/mithro-resume https://linkedin.com/in/mithro

104 followers120 following10 posts

Tim 'mithro' Ansell reposted

I wrote a custom network stack in C to run on my custom silicon RISC-V core, supporting both IPv4 and IPv6 and its now good enough to make HTTP requests. But maybe I'll turn that around and have it accept HTTP requests. We'll see. feat. a really ugly bodge to prevent over-current on the memory bus

Tim 'mithro' Ansell reposted

Replying to @tinytapeout.com

It was the first time we enabled 4 tile high designs, enabling a monster crowd sourced RISC-V microcontroller competition called Asteroid. At 60k standard cells, this is the biggest design so far on Tiny Tapeout. tinytapeout.com/chips/ttsky2...

tinytapeout.com495 TinyQV 'Asteroids' - Crowdsourced Risc-V SoC - Tiny TapeoutA Risc-V SoC with peripherals from the Tiny Tapeout Risc-V challenge, codename 'Asteroids'

Tim 'mithro' Ansell reposted

We just packed 237 of your projects into our most packed ASIC to date and submitted it for manufacture. Let’s take a look inside…

Tim 'mithro' Ansell reposted

Tim 'mithro' Ansell reposted

Replying to @rebelmike.bsky.social

Well, it blinks. The whole you have to unplug it from your computer and plug it into an SD card slot that doesn’t act as an SD host to run the design thing may get old rather quickly.

Tim 'mithro' Ansell reposted

@mith.ro was interviewed by @chrisgammell.bsky.social about the @wafer.space service! Find out more at wafer.space!

wafer.spacewafer.space - Budget silicon manufacturing.Create integrated circuits without breaking the bank!
Chris Gammell@chrisgammell.bsky.social

What happens when one of the main providers that enables #opensource #silicon to thrive...shuts down? Companies like @mith.ro's new wafer.space jump in and offer an even more compelling option. $7K for 1000 chips on the GlobalFoundries GF180MCU process. Learn more: theamphour.com/703-building...

It was awesome to be on @chrisgammell.bsky.social 's Amp Hour podcast again. Find out more about my latest endeavor to make custom silicon manufacturing accessible and follow @wafer.space and bookmark wafer.space to keep up to date!

Chris Gammell@chrisgammell.bsky.social

What happens when one of the main providers that enables #opensource #silicon to thrive...shuts down? Companies like @mith.ro's new wafer.space jump in and offer an even more compelling option. $7K for 1000 chips on the GlobalFoundries GF180MCU process. Learn more: theamphour.com/703-building...

Tim 'mithro' Ansell reposted

I like using a rough sandpaper on the copper because you get a more matte surface finish vs shiny. It really doesn't scan well when its shiny, example:

Natalie@nataliethenerd.com

A send in keeps having issues with their cart, you can see some water damaged vias there in the middle. So instead of via stitching, I made a repro cart which I will upload when I've tested it

Tim 'mithro' Ansell reposted

This is the moment Rej's open source Z80 woke up and said hello! After Zilog’s April 2024 announcement, ReJ quickly taped out a drop-in replacement to preserve retrocomputing and legacy systems. Taped out on TT07, it's a landmark in democratizing chip design.

Tim 'mithro' Ansell reposted

OMG I just found out you can do this: export MANPAGER='vim +MANPAGER --not-a-term -' to use vim as your man pager. It has syntax highlighting. You can jump to other man pages by pressing 'K' <3

Tim 'mithro' Ansell reposted

Here's a video of the testing I did youtu.be/4fpqKfqd39Q?...

youtu.beTesting Tiny Tapeout 7's 12 bit ADCYouTube video by Zero To ASIC Course
Matt Venn@mattvenn.net

Had some fun testing Ricardo Nunes's 12bit SAR ADC on #TinyTapeout 7 this afternoon. A SAR ADC is a nice mixed signal example, with the digital section coordinating the binary search of an internal DAC, homing in on the input signal. Glad I could test it myself and see it working!

Tim 'mithro' Ansell reposted

Triangle rasterisation is surprisingly complex. There are multiple approaches and decisions to make on which pixels to include. As part of testing my Earthrise #FPGA graphics engine, I've created visual tests to complement more automated testing.

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