Hey @chrisgammell.bsky.social , I've just caught up on your excellent chat with Tim Ansell @mith.ro in The Amp Hour ep #703.
Have you scheduled and executed the 2 hours on the weekend to start your own chip-making journey yet?
A remake of the much loved and rare 6580/6581 SID chip perhaps?
**Interesting SPI Routing with iCE40 FPGAs**
I wrote about iCE40 FPGAs, and why the way an FPGA is configured can lead to interesting board design decisions. @mith.ro's Fomu is a useful study due to eschewing a USB-Serial chip for accessing the FPGA and SPI flash.
danielmangum.com/posts/spi-ro...
I wrote a custom network stack in C to run on my custom silicon RISC-V core, supporting both IPv4 and IPv6 and its now good enough to make HTTP requests. But maybe I'll turn that around and have it accept HTTP requests. We'll see.
feat. a really ugly bodge to prevent over-current on the memory bus
I really want
@mith.ro 's wafer.space silicon manufacturing shuttles to succeed and continue to be available, so I was trying to brainstorm some retro-computer/console chips which may be viable.
Most can be done on FPGA today, but custom silicon could make assembly cheaper (reducing FPGA support).
It was the first time we enabled 4 tile high designs, enabling a monster crowd sourced RISC-V microcontroller competition called Asteroid. At 60k standard cells, this is the biggest design so far on Tiny Tapeout.
tinytapeout.com/chips/ttsky2...
And finally here’s a cool current steering DAC that’s designed to drive a VGA monitor by Anton - good to see your mixed signal skills evolving Anton!
tinytapeout.com/chips/ttsky2...
It’s great to see people using our service to test bigger mixed signal designs like OpenRAM. In this test, Jesse put a tiny 16x32 RAM inside a 4 tile digital design.
tinytapeout.com/chips/ttsky2...
Mitch Altman has long inspired us, and as a tribute we included an ASIC version of his classic TV-B-Gone universal off button for TVs. We also took the opportunity to test Sylvain Munalt’s ROM.
tinytapeout.com/chips/ttsky2...
Inspired by Peter Kinget, we commissioned Andrew Kang to create a Mini MOSBius especially for us. The idea is to enable analog designers to get faster feedback on their circuit designs with an analog FPGA.
tinytapeout.com/chips/ttsky2...
@mith.ro is on the current episode of The Amp Hour, for another general-access chip manufacturing option. Give the podcast a listen, and think about the possibilities of making your own small-run chips !
theamphour.com/703-building...
What happens when one of the main providers that enables #opensource#silicon to thrive...shuts down? Companies like @mith.ro's new wafer.space jump in and offer an even more compelling option. $7K for 1000 chips on the GlobalFoundries GF180MCU process. Learn more:
theamphour.com/703-building...
Well, it blinks.
The whole you have to unplug it from your computer and plug it into an SD card slot that doesn’t act as an SD host to run the design thing may get old rather quickly.
What happens when one of the main providers that enables #opensource#silicon to thrive...shuts down? Companies like @mith.ro's new wafer.space jump in and offer an even more compelling option. $7K for 1000 chips on the GlobalFoundries GF180MCU process. Learn more:
theamphour.com/703-building...
It was awesome to be on @chrisgammell.bsky.social 's Amp Hour podcast again. Find out more about my latest endeavor to make custom silicon manufacturing accessible and follow @wafer.space and bookmark wafer.space to keep up to date!
What happens when one of the main providers that enables #opensource#silicon to thrive...shuts down? Companies like @mith.ro's new wafer.space jump in and offer an even more compelling option. $7K for 1000 chips on the GlobalFoundries GF180MCU process. Learn more:
theamphour.com/703-building...
Want to watch a live bringup of @tinytapeout.com 's first test chip with IHP?
I'm cancelling my #open#source#silicon#stream and leaving the stage for Sylvain Munaut!
He starts streaming shortly here: www.youtube.com/watch?v=indh...
I like using a rough sandpaper on the copper because you get a more matte surface finish vs shiny. It really doesn't scan well when its shiny, example:
A send in keeps having issues with their cart, you can see some water damaged vias there in the middle. So instead of via stitching, I made a repro cart which I will upload when I've tested it
This is the moment Rej's open source Z80 woke up and said hello!
After Zilog’s April 2024 announcement, ReJ quickly taped out a drop-in replacement to preserve retrocomputing and legacy systems.
Taped out on TT07, it's a landmark in democratizing chip design.
OMG I just found out you can do this:
export MANPAGER='vim +MANPAGER --not-a-term -'
to use vim as your man pager.
It has syntax highlighting. You can jump to other man pages by pressing 'K' <3
Had some fun testing Ricardo Nunes's 12bit SAR ADC on #TinyTapeout 7 this afternoon.
A SAR ADC is a nice mixed signal example, with the digital section coordinating the binary search of an internal DAC, homing in on the input signal.
Glad I could test it myself and see it working!
Triangle rasterisation is surprisingly complex. There are multiple approaches and decisions to make on which pixels to include. As part of testing my Earthrise #FPGA graphics engine, I've created visual tests to complement more automated testing.